At the 2026 IEEE International Symposium on Circuits and Systems, Huawei's new LogicFolding Design technology has emerged as an innovation in semiconductor packaging. This approach aims to enhance the performance of future Kirin chipsets, promising a 53.5% increase in transistor density and a 12.7% boost in clock speeds. He Tingbo announced this during a keynote on semiconductor advancements, highlighting Huawei's strategic shift toward packaging innovations amid challenges with EUV machinery.
Huawei's LogicFolding Design responds to competition from rival chipmakers, particularly Qualcomm, which is reportedly testing its Snapdragon 8 Elite Gen 6 Pro at clock speeds of up to 5.00GHz. In contrast, Huawei's Kirin SoCs are projected to reach clock speeds of 3.10GHz by 2026, an improvement over the current Kirin 930 Pro’s 2.75GHz. While this falls short of Qualcomm's projections, it signifies a meaningful upgrade in processing capabilities for Huawei's next-generation chips.
As Huawei continues to innovate, the company has set ambitious targets for 2031, aiming for stable clock speeds of 5.00GHz and a transistor density exceeding 400 MTR/mm². These advancements reflect Huawei's commitment to competing in a challenging market and indicate a long-term vision focused on efficiency and performance. The LogicFolding technology is said to enhance P-core efficiency by 41%, potentially leading to significant reductions in power consumption, especially when paired with Huawei's silicon-carbon battery technology in its Pura and Mate series smartphones.
This new design approach is also expected to yield cost savings of around 30% by utilizing older DUV equipment, despite the complexities arising from multi-patterning techniques required for 5nm lithography. These developments suggest Huawei's ability to innovate while minimizing production costs, a crucial factor in maintaining competitiveness in the semiconductor sector.
While the figures presented by Huawei are promising, the real-world performance and feasibility of these advancements remain to be seen. The market will closely monitor how these innovations translate into tangible improvements in the Kirin chipset lineup. As Huawei refines its LogicFolding Design each year, the industry may witness a shift in the competitive dynamics of mobile chip manufacturing, impacting both performance and cost efficiency.
Quick answers
What improvements does the LogicFolding Design offer?
It promises a 53.5% increase in transistor density and a 12.7% boost in clock speeds.
When will the first Kirin chips using this design be available?
The first Kirin chips utilizing LogicFolding Design are expected to be released in 2026.
How does Huawei’s technology compare to Qualcomm’s?
While Qualcomm is testing a 5.00GHz chipset, Huawei's Kirin is projected to reach 3.10GHz by 2026.